Hiển thị các bài đăng có nhãn Cyclone V. Hiển thị tất cả bài đăng
Hiển thị các bài đăng có nhãn Cyclone V. Hiển thị tất cả bài đăng

24/4/16

DE0-Nano-SoC Kit/Atlas-SoC Kit

(Cyclone V Starter Kit)


  • Mã hàng: DE0-Nano-SoC Kit/Atlas-SoC Kit -  Cyclone V Development Kit
  • Đơn giá:  Liên hệ
  • Nhà sản xuất: Terasic. Hàng mới 100%.
  • Tên hàng: DE0-Nano-SoC Kit - P0286 /Atlas-SoC Kit - P0419
  • Tình trạng: Liên hệ
  • Liên hệ: 0934 993 253

Overview


The DE0-Nano-SoC Development Kit presents a robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system. Altera’s SoC integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals and memory interfaces tied seamlessly with the FPGA fabric using a high-bandwidth interconnect backbone. The DE0-Nano-SoC development board is equipped with high-speed DDR3 memory, analog to digital capabilities, Ethernet networking, and much more that promise many exciting applications.

The DE0-Nano-SoC Development Kit contains all the tools needed to use the board in conjunction with a computer that runs the Microsoft Windows XP or later.

Specification

The DE0-Nano-SoC board has many features that allow users to implement a wide range of designed circuits, from simple circuits to various multimedia projects.  

The following hardware is provided on the board: 

 FPGA Device  
  • Altera Cyclone® V SE 5CSEMA4U23C6N device 
  • Serial configuration device – EPCS128 
  • USB-Blaster II onboard for programming; JTAG Mode 
  • 2 push-buttons 
  • 4 slide switches 
  • 8 green user LEDs 
  • Three 50MHz clock sources from the clock generator 
  • Two 40-pin expansion header 
  • One Arduino expansion header (Uno R3 compatibility), can connection with Arduino shields. 
  • One 10-pin Analog input expansion header. (shared with Arduino Analog input) 
  • A/D converter, 4-pin SPI interface with FPGA 

HPS (Hard Processor System)  
  • 925MHz Dual-core ARM Cortex-A9 processor 
  • 1GB DDR3 SDRAM (32-bit data bus) 
  • 1 Gigabit Ethernet PHY with RJ45 connector 
  • USB OTG Port, USB 
  • Micro-AB connector Micro SD card socket 
  • Accelerometer (I2C interface + interrupt) 
  • UART to USB, USB Mini-B connector 
  • Warm reset button and cold reset button 
  • One user button and one user LED 
  • LTC 2x7 expansion header 

Block Diagram of the DE0-Nano-SOC Board

Connectivity  
  • Connect LT24
  • Connect Arduino

Layout


  • Size:68.59x96mm

Resources

DE0-Nano-SoC Resources  

        Documents
TitleVersionSize(KB)Date AddedDownload
DE0-Nano-SoC QSG1.0.024852015-05-21
DE0-Nano-SoC User Manual1.576192015-12-29

      CD-ROM
TitleVersionSize(KB)Date AddedDownload
DE0-Nano-SoC CD-ROM1.1.0-2015-12-29

     Reference Designs with Selected Daughter Cards
Daughter BoardVersionSize(KB)Date AddedDownload
LT241.0.0-2015-06-02
Arduino 1.8" TFT1.0.0-2015-06-02

     Linux BSP (Board Support Package): MicroSD Card Image
TitleLinux
Kernel
Min. microSD
Capacity
Size(KB)Date AddedDownload
Linux Console3.134GB1086582015-05-13
Linux LXDE Desktop with Multi-Touch LCD3.1318287232016-01-21
VIP Camera With the HPS DDR33.13197812016-01-29


Atlas-SoC Kit Resources  

     Reference Designs and Community Support
TitleLinux
Kernel
Min. microSD
Capacity
Size(KB)Date AddedDownload
Rocketboards.org---2015-07-31

     Documents
TitleVersionSize(KB)Date AddedDownload
Atlas-SoC User Manual1.239442015-10-20
Atlas-SoC kit_QSG.pdf1.122612015-10-08

     Please note that all the source codes are provided "as is". For further support or modification, please contact Terasic Support and your request will be transferred to Terasic Design Service. More resources about IP and Dev. Kit are available on Altera User Forums.

Atlas-SoC Examples:

1. RocketBoards Website 
2. VIP Camera With the HPS DDR3 on Atlas-SoC Kit | Projects | RocketBoards.org 
3. 2.4" Touch LCD Painter Demo on Atlas-SOC | RocketBoards.org 
4. Linux LXDE Desktop with Multi-Touch LCD on Atlas-SoC Kit | Projects | RocketBoards.org 
5. Digital Camera on Atlas-SoC kit | Projects | RocketBoards.org 
6. OpenCL Mandelbrot Demo on Atlas-SoC | Projects | RocketBoards.org 
7. Hands on SoC Demo | Projects | RocketBoards.org


Kit Contents

Same as ATLAS-SoC
  • Color Box  
  • DE0-Nano-SoC Board  
  • Power DC Adapter  
  • Type A to Mini-B USB Cable x1  
  • Type A to Micro-B USB Cable x1  
  • Sponsor Card
Different from ATLAS-SoC

Same as DE0-Nano-SoC
  • Color Box  
  • ATLAS-SoC Board  
  • Power DC Adapter  
  • Type A to Mini-B USB Cable x1  
  • Type A to Micro-B USB Cable x1  
  • Sponsor Card
Different from DE0-Nano-SoC
What's different between the DE0-Nano-SoC kit and the Atlas-SoC kit?          

The DE0-Nano-SoC kit  uses the same printed circuit board as the Altas-SoC development platform. The only difference is the getting-started process for the two kits. Both kits come with a unique set of reference designs, tools, and documentation providing very different user experiences. Here's how to decide which is better for you:

DE0-Nano-SoC: Designed for the hardware developer. It provides reference designs and tutorials to guide you through your first FPGA, HPS, and system designs.

Atlas-SoC: Designed for the embedded software developer. It boots Linux, runs web and VNC servers, and provides reference designs, development tools, and tutorials to accelerate the learning curve of developing software for SoCs.

Can’t decide which to use? Here’s how to get them both.

Regardless of which kit you have, the reference designs, tools, documentation, and SD card images are available for free download. Because the hardware is the same, you can turn a DE0-Nano-SoC kit  into an Atlas-SoC kit , or visa-versa, with a simple download and flash card update. Here's where to get the kit"soft" content:

For more details on the Atlas-SoC kit, please visit:  http://www.rocketboards.org/atlas-soc

Demo

  • If the film is unavailable, please kindly try another link below:       
          http://www.youtube.com/embed/OoTcNsyfJRg  

Demo Downland Link  
Spider application software for Andriod:  Terasic-spider.apk



HotLine: 0934 993 253

Skype: linhkienmach

 Email: linhkienmach@gmail.com




Nguồn Terasic

17/8/15

Cyclone V GT FPGA Development Kit - TERASIC

(Cyclone V)
  • Mã hàng: T0156.
  • Đơn giá:    Liên hệ
  • Tên hàng: Altera Cyclone V GT FPGA Development Kit
  • Nhà sản xuất: Terasic. Hàng mới 100%.
  • Xuất sứ: Taiwan.
  • Tấm mạch in đã được lắp ráp hoàn chỉnh.
  • Liên hệ: 0935 408 286 or 0934 993 253
  • Fanpage: Linh Kiện Mạch - Mạch Thí Nghiệm FPGA

Overview

The Altera® Cyclone® V GT FPGA Development Kit can be used to prototype Cyclone V GT FPGA or Cyclone V GX FPGA applications. It offers a quick and simple way to develop low-cost and low-power FPGA system-level designs and achieve rapid results. This kit supports a myriad of functionalities such as:

•FPGA prototyping
•FPGA power measurement
•Transceiver I/O performance up to 5.0 Gbps
•PCI Express® (PCIe®) Gen2 x4 (at 5.0 Gbps per lane)
•Endpoint or rootport support

Specification
FPGA Device
  • Configuration and Debug
  • Quad Serial Configuration device – EPCQ256 on FPGA
  • On-Board USB Blaster (Normal Type-B USB connector)
  • JTAG and AS mode configuration supported 
Memory Device
  • Communication
  • Embedded USB-Blaster II (JTAG)
  • Fast Passive Parallel (PFL)
  • Altera EPCQ—EPCQ256SI16N (Quad Serial Configuration Device)
Standard communication ports
  • PCIe x4 edge connector
  • Gigabit Ethernet (GbE)
  • One SMA clock output
  • Two universal high-speed mezzanine card (HSMC) connectors, each with four high-speed serial transciever channels
  • One serial digital interface (SDI) channel —1 SMB for RX and 1 SMB for TX
  • Channel shared with HSMA via resistor stuffing option
Push buttons, DIP switches, and LEDs
Clocking
  • Programmable clock generator for FPGA reference clock input
  • 125 MHz LVDS oscillator for FPGA reference clock input
  • 148.5/148.35 MHz LVDS VCXO for FPGA reference clock input
  • 50 MHz single-ended oscillator for FPGA and MAX  V CPLD clock input
  • 100 MHz single-ended oscillator for MAX  V CPLD configuration clock input
  • SMA input (LVPECL)
Power
  • Laptop DC Input 14 – 20 V adapter
  • PCIe edge connector
System monitoring circuit
  • Power (Voltage, Current, Wattage)
Mechanical
  • PCIe card standard size (4.376" x 6.600")
          Block Diagram 

Resources

Documents

TitleVersionSize(KB)Date AddedDownload
Cyclone V GT FPGA Development Kit User Guide (PDF)2013-01-08
Cyclone V GT FPGA Development Board Reference Manual (PDF)2013-01-08

CD-ROM

TitleVersionSize(KB)Date AddedDownload
Kit installation2015-03-19


Order Now



HotLine: 0935.408.286 or 0934 993 253
Skype: linhkienmach
 Email: linhkienmach@gmail.com
Fanpage: Linh Kiện Mạch - Mạch Thí Nghiệm FPGA



Nguồn Terasic
 

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